#ifndef __SOPHGO_CLK__
#define __SOPHGO_CLK__

//PLL ID
#define MPLL_CLK	0
#define FPLL_CLK	3
#define DPLL0_CLK	4
#define DPLL1_CLK	5

//clock mode
#define NORMAL_MODE	0
#define FAST_MODE	1
#define SAFE_MODE	2
#define BYPASS_MODE	3
#endif
